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Main page>IEC 62530-2:2021 - SystemVerilog - Part 2: Universal Verification Methodology Language Reference Manual
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sklademVydáno: 2021-07-26
IEC 62530-2:2021 - SystemVerilog - Part 2: Universal Verification Methodology Language Reference Manual

IEC 62530-2:2021

SystemVerilog - Part 2: Universal Verification Methodology Language Reference Manual

CURRENCY
449.83 €
Označení normy:IEC 62530-2:2021
Vydáno:2021-07-26
Jazyk:Anglicky
DESCRIPTION

IEC 62530-2:2021

IEC 62530-2:2021(E) establishes the Universal Verification Methodology (UVM), a set of application programming interfaces (APIs) that defines a base class library (BCL) definition used to develop modular, scalable, and reusable components for functional verification environments. The APIs and BCL are based on the IEEE standard for SystemVerilog, IEEE Std 1800™. This publication has the status of a double logo IEC/IEEE standard.

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